Digital Vlsi Circuits
2:40pm–3:55pm
Cin Alfred Lerner Hall
Morningside
Seat data provenance: Directory as of August 23, 2026 at 4:00 AM
Description
Lect: 3. Design and analysis of high speed logic and memory. Digital CMOS and BiCMOS device modeling. Integrated circuit fabrication and layout. Interconnect and parasitic elements. Static and dynamic techniques. Worst-case design. Heat removal and I/O. Yield and circuit reliability. Logic gates, pass logic, latches, PLAs, ROMs, RAMs, receivers, drivers, repeaters, sense amplifiers
Reviews
Course experience
n=2, 2013–2017
Aggregated across everyone who has taught this course.
Teaching quality
1.5 / 5
Grading fairness
No signal
Workload
5.0 / 5 · Very heavy
Difficulty
4.0 / 5 · Hard
Overall sentiment
Mixed
Would take again
Majority say yes
In your week
Where it meets
Flat map — motion reduced
Workload and grading
- Grading
- Not published
- Format
- Not published
- Credits
- 3 credits
Reported workload
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